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drm/i915: convert PIPE_CLK_SEL to transcoder
2012-10-26  Paulo Zanonidrm/i915: convert PIPE_CLK_SEL to transcoder
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-26  Paulo Zanonidrm/i915: add TRANSCODER_EDP
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-26  Paulo Zanonidrm/i915: don't call Haswell PCH code when we can't...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-26  Paulo Zanonidrm/i915: simplify intel_crtc_driving_pch
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-26  Paulo Zanonidrm/i915: fix checks inside haswell_crtc_{enable, disable}
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-26  Paulo Zanonidrm/i915: fix checks inside ironlake_crtc_{enable,...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-26  Paulo Zanonidrm/i915: fork a Haswell version of ironlake_crtc_...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: set the correct function pointers for Haswell DP
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: implement Haswell DP link train sequence
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: fix Haswell DP M/N registers
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: add DP support to intel_ddi_disable_port
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: add DP support to intel_ddi_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: add DP support to intel_enable_ddi
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: add DP support to intel_ddi_get_hw_state
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: add DP support to intel_ddi_get_encoder_port
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-18  Paulo Zanonidrm/i915: fix DP AUX register definitions on Haswell
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-17  Paulo Zanonidrm/i915: use TU_SIZE macro at intel_dp_set_m_n
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-17  Paulo Zanonidrm/i915: add basic Haswell DP link train bits
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-17  Paulo Zanonidrm/i915: add DP support to intel_ddi_pll_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-17  Paulo Zanonidrm/i915: add intel_ddi_set_pipe_settings
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-17  Paulo Zanonidrm/i915: add DP support to intel_ddi_enable_pipe_func
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: pipe and planes should be disabled on haswell_crtc...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: disable DDI_BUF_CTL at the correct time
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: don't implement WaDisableEarlyCull for Haswell
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: don't rely on previous values set on DDI_BUF_CTL
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: completely rewrite the Haswell PLL handling...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: add haswell_set_pipeconf
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: add proper CPU/PCH checks to crtc_mode_set...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: add haswell_crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: enable and disable PIPE_CLK_SEL at the right...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: enable and disable DDI_FUNC_CTL at the right...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-10  Paulo Zanonidrm/i915: rewrite the LCPLL code
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-10-02  Paulo Zanonidrm/i915: extract intel_set_pipe_timings from crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-26  Paulo Zanonidrm/i915: make sure we write all the DIP data bytes
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-25  Paulo Zanonidrm/i915: remove unused variables from ironlake_crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-25  Paulo Zanonidrm/i915: extract compute_dpll from ironlake_crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-25  Paulo Zanonidrm/i915: extract set_m_n from ironlake_crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-25  Paulo Zanonidrm/i915: don't recheck for invalid pipe bpp
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-24  Paulo Zanonidrm/i915: BUG() on unexpected HDMI register
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-20  Paulo Zanonidrm/i915: extract compute_clocks from ironlake_crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-20  Paulo Zanonidrm/i915: simplify setting DSPCNTR inside ironlake_crtc_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-20  Paulo Zanonidrm/i915: extract ironlake_set_pipeconf form ironlake_crtc_m...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-03  Paulo Zanonidrm/i915: add workarounds to gen7_render_ring_flush
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-03  Paulo Zanonidrm/i915: add workarounds directly to gen6_render_ring_flush
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-09-03  Paulo Zanonidrm/i915: add gen7_render_ring_flush
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-10  Paulo Zanonidrm/i915: try harder to find WR PLL clock settings
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-10  Paulo Zanonidrm/i915: use the correct encoder type when comparing
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-09  Paulo Zanonidrm/i915: add parentheses around PIXCLK_GATE definitions
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-09  Paulo Zanonidrm/i915: reindent Haswell register definitions
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-09  Paulo Zanonidrm/i915: completely reset the value of DDI_FUNC_CTL
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-09  Paulo Zanonidrm/i915: correctly set the DDI_FUNC_CTL bpc field
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-09  Paulo Zanonidrm/i915: set the DDI sync polarity bits
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-09  Paulo Zanonidrm/i915: fix pipe DDI mode select
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-08-07  Paulo Zanonidrm/i915: add more Haswell PCI IDs
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-25  Paulo Zanonidrm/i915: add port field to struct intel_dp and use it
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-25  Paulo Zanonidrm/i915: move common code to intel_dp_set_link_train
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-20  Paulo Zanonidrm/i915: don't forget the PCH backlight registers
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-20  Paulo Zanonidrm/i915: try to train DP even harder
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-05  Paulo Zanonidrm/i915: fix PIPE_DDI_PORT_MASK
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-05  Paulo Zanonidrm/i915: don't ironlake_init_pch_refclk() on LPT
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-05  Paulo Zanonidrm/i915: get rid of dev_priv->info->has_pch_split
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-07-05  Paulo Zanonidrm/i915: add PCH_NONE to enum intel_pch
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-06-28  Paulo Zanonidrm/i915: fix PIPE_WM_LINETIME definition
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-06-12  Paulo Zanonidrm: increase DRM_OBJECT_MAX_PROPERTY to 24
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: add some barriers when changing DIPs
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: remove comment about HSW HDMI DIPs
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: don't set SDVO_BORDER_ENABLE when we're HDMI
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: don't write 0 to DIP control at HDMI init
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: disable DIP while changing the port
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: explicitly disable the DIPs we're not using
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: don't wait for vblank while writing InfoFrames
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: enable DIP before enabling each InfoFrame
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: only set the HDMI port on the DIP once
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: properly alternate between DVI and HDMI
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-30  Paulo Zanonidrm/i915: add set_infoframes to struct intel_hdmi
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-20  Paulo Zanonidrm/i915: implement hsw_write_infoframe
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-20  Paulo Zanonidrm/i915: small hdmi coding style cleanups
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: add CRTC properties
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: add 'count' to struct drm_object_properties
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: make the connector properties code use the object...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: add generic ioctls to get/set properties on any...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: create struct drm_object_properties and use it
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: WARN() when drm_connector_attach_property fails
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-17  Paulo Zanonidrm: add drm_property_change_is_valid
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: implement ironlake_wait_for_vblank
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: set the DIP port on ibx_write_infoframe
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: ibx_write_infoframe can disable AVI
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: split ironlake_write_infoframe into ibx_...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: simplify intel_encoder_commit
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: mask the video DIP frequency when changing it
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: disable the infoframe before changing it
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: break intel_infoframe_flags into _enable...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: mask the video DIP port select
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: start writing infoframes at address 0 on...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: change coding style of the write_infoframe...
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-08  Paulo Zanonidrm/i915: DSL_LINEMASK is 12 bits only on gen2
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-03  Paulo Zanonidrm/i915: enable dip before writing data on gen4
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-03  Paulo Zanonidrm/i915: make DBLCLK modes work
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-05-03  Paulo Zanonidrm/i915: rename AVI InfoFrame field 'PR' to 'YQ_CN_PR'
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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2012-04-20  Paulo Zanonidrm: add DRM_MODE_FLAG_DBLCLK to CEA modes requiring it
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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