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drm/i915: Make the DP rates int instead of uint32_t
2015-03-20  Ville Syrjälädrm/i915: Make the DP rates int instead of uint32_t
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2015-03-17  Ville Syrjälädrm/i915: Remove the preliminary_hw_support shackles...
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2015-03-17  Ville Syrjälädrm/i915: Read CHV_PLL_DW8 from the correct offset
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2015-03-17  Ville Syrjälädrm/i915: Rewrite IVB FDI bifurcation conflict checks
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2015-03-17  Ville Syrjälädrm/i915: Rewrite some some of the FDI lane checks
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2015-03-17  Ville Syrjälädrm/i915: Use FW_WM() macro for older gmch platforms too
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2015-03-17  Ville Syrjälädrm/i915: Add polish to VLV WM shift+mask operations
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2015-03-17  Ville Syrjälädrm/i915: Use plane->state->fb instead of plane->fb...
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2015-03-17  Ville Syrjälädrm/i915: Reduce clutter by using the local plane pointer
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2015-03-17  Ville Syrjälädrm/i915: Remove debug prints from primary plane update...
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2015-03-17  Ville Syrjälädrm/i915: Disable DDR DVFS on CHV
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2015-03-17  Ville Syrjälädrm/i915: Enable the maxfifo PM5 mode when appropriate...
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2015-03-17  Ville Syrjälädrm/i915: Rewrite VLV/CHV watermark code
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2015-03-17  Ville Syrjälädrm/i915: Fix chv cdclk support
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2015-03-17  Ville Syrjälädrm/i915: Allow pixel clock up to 95% of cdclk on CHV
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2015-03-17  Ville Syrjälädrm/i915: Make sure PND deadline mode is enabled on...
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2015-03-17  Ville Syrjälädrm/i915: Read out display FIFO size on VLV/CHV
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2015-03-17  Ville Syrjälädrm/i915: Pass plane to vlv_compute_drain_latency()
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2015-03-17  Ville Syrjälädrm/i915: Reorganize VLV DDL setup
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2015-03-17  Ville Syrjälädrm/i915: Hide VLV DDL precision handling
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2015-03-17  Ville Syrjälädrm/i915: Simplify VLV drain latency computation
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2015-03-17  Ville Syrjälädrm/i915: Kill DRAIN_LATENCY_PRECISION_* defines
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2015-03-17  Ville Syrjälädrm/i915: Reduce CHV DDL multiplier to 16/8
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2015-03-17  Ville Syrjälädrm/i915: Reduce CHV DPLL min vco frequency to 4.8 GHz
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2015-03-09  Ville Syrjälädrm/i915: Fix struct_mutex deadlock due to merge fumble
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2015-02-26  Ville Syrjälädrm/i915: Add media rc6 residency file to sysfs
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2015-02-13  Ville Syrjälädrm/i915: Introduce intel_set_rps()
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2015-02-11  Ville Syrjälädrm/i915: Really ignore long HPD pulses on eDP
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2015-02-03  Ville Syrjälädrm/modes: Print the mode status in human readable...
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2015-02-03  Ville Syrjälädrm/modes: Print the mode status in human readable...
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2015-01-30  Ville Syrjälädrm/i915: Handle CHV in vlv_set_rps_idle()
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2015-01-27  Ville Syrjälädrm/i915: Use intel_gpu_freq() and intel_freq_opcode()
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2015-01-27  Ville Syrjälädrm/i915: Add intel_gpu_freq() and intel_freq_opcode()
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2015-01-27  Ville Syrjälädrm/i915: Add gt_act_freq_mhz sysfs file
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2015-01-27  Ville Syrjälädrm/i915: Update PMINTRMSK on VLV/CHV after sysfs min...
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2015-01-27  Ville Syrjälädrm/i915: Change VLV WIZ hashing mode to 16x4
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2015-01-27  Ville Syrjälädrm/i915: Change CHV WIZ hashing mode to 16x4
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2015-01-27  Ville Syrjälädrm/i915: Drop some more CHV pre-production workarounds
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2015-01-27  Ville Syrjälädrm/i915: Implement Wa4x4STCOptimizationDisable:chv
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2015-01-27  Ville Syrjälädrm/i915: Rename 'reg' to 'clk_reg' to unconfuse it...
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2015-01-27  Ville Syrjälädrm/i915: Drop VLV checks from rc6p and rc6pp sysfs...
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2015-01-27  Ville SyrjäläRevert "Revert "drm/i915/chv: Use timeout mode for...
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2015-01-27  Ville Syrjälädrm/i915: Configure GEN6_RP_DOWN_TIMEOUT on CHV
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2015-01-27  Ville Syrjälädrm/i915: Change VLV GEN6_RP_DOWN_TIMEOUT value to...
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2015-01-27  Ville Syrjälädrm/i915: Disable RC6 before configuring in on VLV/CHV
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2015-01-12  Ville Syrjälädrm/i915: Don't pretend SDVO hotplug works on 915
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2015-01-12  Ville Syrjälädrm/i915: Don't register HDMI connectors for eDP ports...
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2015-01-12  Ville Syrjälädrm/i915: Remove I915_HAS_HOTPLUG() check from i915_hpd_irq_...
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2015-01-12  Ville Syrjälädrm/i915: Make hpd arrays big enough to avoid out of...
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2014-12-18  Ville SyrjäläRevert "drm/i915: Preserve VGACNTR bits from the BIOS"
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2014-12-18  Ville Syrjälädrm/i915: Don't call intel_prepare_page_flip() multiple...
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2014-12-18  Ville Syrjälädrm/i915: Kill check_power_well() calls
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2014-12-17  Ville Syrjälädrm: Do basic sanity checks for user modes
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2014-12-17  Ville Syrjälädrm: Perform basic sanity checks on probed modes
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2014-12-17  Ville Syrjälädrm: Reorganize probed mode validation
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2014-12-10  Ville Syrjälädrm/i915: Make i915_pipe_crc_read() oops proof
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2014-12-10  Ville Syrjälädrm/i915: Allocate the pipe_crc->entires with kcalloc()
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2014-12-10  Ville Syrjälädrm/i915: Protect pipe_crc->entries update
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2014-12-10  Ville Syrjälädrm/i915: Fix CRC support for DP port D on CHV
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2014-12-10  Ville Syrjälädrm/i915: Engage the DP scramble reset for pipe C on CHV
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2014-12-05  Ville Syrjälädrm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/
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2014-12-03  Ville Syrjälädrm/i915: Deal with video overlay on GPU reset
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2014-12-03  Ville Syrjälädrm/i915: Reject modeset when the same digital port...
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2014-12-03  Ville Syrjälädrm/i915: Disable crtcs gracefully before GPU reset...
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2014-12-03  Ville Syrjälädrm/i915: Grab modeset locks for GPU rest on pre-ctg
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2014-12-03  Ville Syrjälädrm/i915: Implement GPU reset for g33
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2014-12-03  Ville Syrjälädrm/i915: Implement GPU reset for 915/945
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2014-12-03  Ville Syrjälädrm/i915: Restore the display config after a GPU reset...
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2014-12-03  Ville Syrjälädrm/i915: Fix gen4 GPU reset
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2014-12-03  Ville Syrjälädrm/i915: Don't clobber crtc->new_config when nothing...
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2014-11-26  Ville Syrjälädrm/i915: Cancel vdd off work before suspend
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2014-11-24  Ville Syrjälädrm/i915: Ignore SURFLIVE and flip counter when the...
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2014-11-20  Ville Syrjälädrm/i915: Read power well status before other registers...
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2014-11-17  Ville Syrjälädrm/i915: Drop WaRsForcewakeWaitTC0:vlv
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2014-11-17  Ville Syrjälädrm/i915: Drop the HSW special case from __gen6_gt_wait_for_...
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2014-11-17  Ville Syrjälädrm/i915: Change CHV SKU400 GPU freq divider to 10
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2014-11-17  Ville Syrjälädrm/i915: Add missing newline to 'DDR speed' debug...
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2014-11-17  Ville Syrjälädrm/i915: Refactor vlv/chv GPU frequency divider setup
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2014-11-17  Ville Syrjälädrm/i915: Improve PCBR debug information
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2014-11-17  Ville Syrjälädrm/i915: Warn if GPLL isn't used on vlv/chv
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2014-11-17  Ville Syrjälädrm/i915: Add a name for the Punit GPLLENABLE bit
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2014-11-17  Ville Syrjälädrm/i915: Silence valleyview_set_rps()
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2014-11-17  Ville Syrjälädrm/i915: Reinit display irqs and hpd from chv pipe...
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2014-11-14  Ville Syrjälädrm/i915: Fix comments about CHV snoop behaviour
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2014-11-14  Ville Syrjälädrm/i915: Use vlv display irq setup code for chv
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2014-11-14  Ville Syrjälädrm/i915: Refactor vlv_display_irq_uninstall()
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2014-11-14  Ville Syrjälädrm/i915: Read the CCK fuse register from CCK
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2014-11-14  Ville Syrjälädrm/i915: Remove most INVALID_PIPE checks from the...
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2014-11-14  Ville Syrjälädrm/i915: Register the backlight device after the modeset...
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2014-11-14  Ville Syrjälädrm/i915: Pass the current pipe from eDP init to backlight...
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2014-11-14  Ville Syrjälädrm/i915: Don't deref NULL crtc in intel_get_pipe_from_conne...
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2014-11-14  Ville Syrjälädrm/i915: Skip .get_backlight() when backlight isn...
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2014-11-14  Ville Syrjälädrm/i915: Warn if trying to poke a VLV backlight on...
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2014-11-07  Ville Syrjälädrm/i915: Cache HPLL frequency on VLV/CHV
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2014-11-07  Ville Syrjälädrm/i915: Move the .global_resources() hook call into...
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2014-11-07  Ville Syrjälädrm/i915: Kill leftover GTIIR writes from valleyview_irq_pre...
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2014-11-07  Ville Syrjälädrm/i915: Drop useless VLV_IIR writes from vlv_display_irq_p...
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2014-11-07  Ville Syrjälädrm/i914: Refactor vlv_display_irq_postinstall()
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2014-11-07  Ville Syrjälädrm/i915: Refactor vlv_display_irq_reset()
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2014-11-07  Ville Syrjälädrm/i915: Make valleyview_display_irqs_(un)install...
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